Cadence 实习生火热招募中
公司介绍
Cadence是一家电子设计自动化 (EDA)与半导体知识产权(IP)的领先供应商。我们的定制
/模拟工具帮助工程师设计构成芯片级系统(SoCs)芯片的晶体管、标准单元和IP模块。我
们的数字工具可对千兆级、千兆赫兹及最新半导体工艺节点的SoC进行自动化设计和验证
。我们的IC封装和PCB工具可实现完整的电路板和子系统的设计。
Cadence还提供用于存储器、接口协议、模拟/混合信号组件和专业处理器设计IP和验证
IP不断增长的产品。在系统层面，Cadence提供一个集成的硬件/软件套件协同开发平台
。总之，Cadence的创新技术在创造改变生活的重大电子产品中起着至关重要的作用。
Cadence作为全球EDA行业的领军人物，我们为优秀的你提供有竞争力的薪酬福利，前沿
的技术平台，全面系统的培训课程和畅通的职业晋升通道。同时你还将参与到众多的公
益活动和多彩的员工活动中。无论是你的技术能力，外语水平，还是管理技巧，人际沟
通，都能得到全方位的提升，使你在未来的工作和生活中受益良多。我们关注每一个员
工的职业发展，并为之努力。
如果你热爱产品验证、软件研发、IC设计工作，热衷探索EDA最前沿的技术，并且喜欢国
际化的团队工作氛围，那还等什么？
快快加入Cadence大家庭！简历请直接发送至：job_china@cadence.com，Cadence将为您
提供最广阔的舞台！
欢迎关注Cadence大街网主页http://www.dajie.com/corp/1003726/project/56726
更多职位信息请关注Cadence中国招聘官方微信平台，微信号：Cadence微招聘
实习时间：每周保证4天，维持6个月以上
地点：上海浦东嘉里城(7号线，花木路站)；北京东城区环球贸易中心
欢迎2017年毕业的微电子、集成电路、电子信息工程等相关专业的硕士生投递，表现优
秀者有机会转正。
实习安排：
通过严格的面试筛选后，能接触到EDA (电子设计自动化)行业最前沿的技术，并能得到
公司资深工程师的培训和指导，从中领略跨国美资企业的工作氛围与人文环境。
数字后端产品验证（上海）
1. Intern-Product Validation Intern (GPS)
Position Description:
This intern will work in Encounter GPS (Global Physical Synthesis) PV team.
The responsibilities include:
1.Assist in Cadence EDI development and validation
2.Validate and maintain comprehensive GPS unit and flow test cases for
Encounter Digital Implementation System.
3.Develop test suites of the new features of EDI GPS functions
Position Requirements:
1.MS or excellent undergraduate
2.Digital IC design knowledge is necessary, statistic timing analysis
knowledge is a strong plus
3.Unix System knowledge, vi/TCL/TK/CSH/Perl will be plus.
4.Good communication in English and Chinese, good confidence and self-
motivation.
5.Commitment to work as intern for at least 6 months
2. Intern-Product Validation(Low Power)
Position Description:
This intern will work in Encounter Low Power Product Validation team. The
Responsibilities include:
1.Assist in Cadence low power flow development and validation
2.Validate and maintain comprehensive lower power unit and flow test cases
for Encounter Digital Implementation System.
3.Develop test suites of the new features of Cadence's low power tool and
solution
Position Requirements:
1.MS or excellent undergraduate
2.Digital IC design knowledge is necessary, statistic timing analysis
knowledge is a strong plus
3.Unix System knowledge, vi/TCL/TK/CSH/Perl will be plus.
4.Good communication in English and Chinese, good confidence and self-
motivation.
5.Commitment to work as intern for at least 6 months
3. Intern-Product Validation (Regression)
Position Description:
This position is responsible for the ICD PV regression upgrade project.
Position Requirements:
1.Bachelor (preferable Master degree) candidate for Computer Science or
related majors
2.Result driven and details focused working attitude
3. Excellent analytical skills and complex system problem solving skills
4. Knowledge in Web design/programing (javascript, perl, php, Python,HTML/
DHTML,XML)
5. Knowledge in NFS/Distributed Processing/Distributed Processing/Network is
a strong plus
6. Good written English and oral English is a strong plus
7. Being able to work at least 4 days/week for more than three months
软件研发（上海）
1. R&D Intern- Placement
Position Description:
1. This intern will work in Encounter placement team for project development
and analysis.
Position Requirements:
1. EE/CS MS or PH.D, good at C/C++ programming.
2. Could understand the concept of EDA backend design, especially placement.
3. Strong mathematics background: non-linear optimization is a plus.
4. Good communication in English and Chinese, good confidence and good self-
motivation.
模拟电路验证（北京）
1. PV Intern for Circuit Simulator
Position Description:
1. Work together with a group of professionals on a variety of PV (Product
Validation)/ QA(Quality Assurance) projects for circuit simulators including
Spectre, APS, XPS, SpectreRF, UltraSim, AMS and for Virtuoso ADE (Analog
Design Environment).
Position Requirements:
1. MS degree candidate majored in Microelectronics, EE, or related.
2. Customer IC design experience.
3. Teamwork and good communication skills.
4. Can work 4-5 days/week, last for at least 6 months
2. QA Intern for Simulation Software
Position Description:
1. The position is for analog circuit simulation engineer responsible for
quality monitor.
2. The engineer will be responsible to manage the simulation product release
quality and improve the develop process.
Position Requirements:
1. MS degree candidate majored in Microelectronics, EE or related.
2. Customer IC designs experience.
3. Teamwork and good communication skills.
4. Proven ability to learn from work and work with a cross-functional team
to improve product quality.